I/O interface refers to the technique used to transport data between external I/O devices and internal storage. Any computer system’s peripherals interface with the CPU using specialized communication channels. The disparities between the CPU and peripheral are addressed by means of these communication channels. Special hardware modules, also known as interface units, are present between the central processing unit (CPU) and peripheral devices to monitor and synchronize all input and output transfers.

How Many Types Of Modes Of I/O Data Transfer?

How Many Types Of Modes Of I/O Data Transfer?

The memory unit typically houses binary data that is obtained from an external device. The memory unit is where the data originates before being transported from the CPU to the external device. The memory unit is always the source and the destination for information, which the CPU only processes. There are various ways in which the CPU and the I/O devices can communicate data. There are three methods that data can be sent to and from the peripherals.

  1. Programmed I/O.
  2. Interrupt- initiated I/O.
  3. Direct memory access( DMA).

Now let’s discuss each mode one by one.

1. Programmed I/O :

It is because of how the computer program’s I/O instructions turned out. Every data item transfer is started by a program instruction. Typically, memory and a CPU register are used for the transfer. In this instance, the peripheral devices’ CPU must continuously monitor them.Example of Programmed I/O: In this case, the I/O device does not have direct access to the memory unit. A transfer from I/O device to memory requires the execution of several instructions by the CPU, including an input instruction to transfer the data from device to the CPU and store instruction to transfer the data from CPU to memory. In programmed I/O, the CPU stays in the program loop until the I/O unit indicates that it is ready for data transfer. This is a time consuming process since it needlessly keeps the CPU busy. This situation can be avoided by using an interrupt facility. This is discussed below.

2. Interrupt- initiated I/O :

Given that the CPU is kept busy needlessly in the example above. Using an interrupt driven data transmission approach can very likely prevent this kind of issue. When data is available from any device, the interface can be informed to issue an interrupt request signal by using the interrupt facility and special procedures.The CPU can continue running any other software in the interim. In the meantime, the interface continues to watch the apparatus. The device sends an interrupt request signal to the computer whenever it detects that it is ready to transfer data. When the CPU detects an external interrupt signal, it briefly pauses whatever it was doing, switches to the service program to handle the I/O transfer, and then resumes its previous work.

  • The I/O transfer rate is limited by the speed with which the processor can test and service a device.
  • The processor is tied up in managing an I/O transfer; a number of instructions must be executed for each I/O transfer.
  • Terms:
    • Hardware Interrupts: Interrupts present in the hardware pins.
    • Software Interrupts: These are the instructions used in the program whenever the required functionality is needed.
    • Vectored interrupts: These interrupts are associated with the static vector address.
    • Maskable Interrupts: These interrupts can be enabled or disabled explicitly.
    • Non-vectored interrupts: These interrupts are associated with the dynamic vector address.
    • Non-maskable interrupts: These are always in the enabled state. we cannot disable them.
    • External interrupts: Generated by external devices such as I/O.
    • Internal interrupts: These devices are generated by the  internal components of the processor such as power failure, error instruction, temperature sensor, etc.
    • Synchronous interrupts: These interrupts are controlled by the fixed time interval. All the interval interrupts are called as synchronous interrupts.
    • Asynchronous interrupts: These are initiated based on the feedback of previous instructions. All the external interrupts are called as asynchronous interrupts.

3. Direct memory access( DMA) :

The CPU’s speed limits the amount of data that can move between a memory unit and a fast storage device like a magnetic disk. Thus, we may do away with the CPU’s intervention and enable peripherals to communicate directly with one another via memory buses. Direct Memory Access, or DMA, is the term used to describe this kind of data transfer method. The CPU is not in use and has no control over the memory buses during DMA. In order to govern the direct transfer between the memory unit and the I/O devices, the DMA controller assumes control of the buses.

  1. nsfer directly between the I/O devices and the memory unit.
    1. Bus grant request time.
    2. Transfer the entire block of data at transfer rate of device because the device is usually slow than the speed at which the data can be transferred to CPU.
    3. Release the control of the bus back to CPU So, total time taken to transfer the N bytes = Bus grant request time + (N) * (memory transfer rate) + Bus release control time.
  2. Buffer the byte into the buffer
  3. Inform the CPU that the device has 1 byte to transfer (i.e. bus grant request)
  4. Transfer the byte (at system bus speed)
  5. Release the control of the bus back to CPU.


Standardization: I/O interfaces provide a standard way of communicating with external devices. This means that different devices can be connected to a computer using the same interface, which makes it easier to swap out devices and reduces the need for specialized hardware.
Modularity: With I/O interfaces, different devices can be added or removed from a computer without affecting the other components. This makes it easier to upgrade or replace a faulty device without affecting the rest of the system.
Efficiency: I/O interfaces can transfer data between the computer and the external devices at high speeds, which allows for faster data transfer and processing times.
Compatibility: I/O interfaces are designed to be compatible with a wide range of devices, which means that users can choose from a variety of devices that are compatible with their computer’s I/O interface.


Cost: I/O interfaces can be expensive, especially if specialized hardware is required to connect a particular device to a computer system.
Complexity: Some I/O interfaces can be complex to configure and require specialized knowledge to set up and maintain. This can be a disadvantage for users who are not familiar with the technical aspects of computer hardware.
Compatibility issues: While I/O interfaces are designed to be compatible with a wide range of devices, there can still be compatibility issues with certain devices. In some cases, device drivers may need to be installed to ensure proper functionality.
Security risks: I/O interfaces can be a security risk if they are not properly configured or secured. Hackers can exploit vulnerabilities in I/O interfaces to gain unauthorized access to a computer system or steal data.

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